1. Field of the Invention
The present invention relates to an interpolation method for a video signal, and a display device performing interpolation for a video signal. The present invention further relates to a liquid crystal display device capable of making a display image in accordance with a digital video signal.
2. Description of the Prior Art
A circuit adjusting the size of an image to be displayed, to fit to the actual dimension of a display screen by performing interpolation for an input video signal is disclosed in Japanese Patent Laid-Open Application No. 79905/98 (U.S. Pat. No. 5,818,416). The circuit described in this reference aims at easily enlarging or contracting the size of an image to be displayed on a digital display device.
To this end, the known circuit is arranged to enable the value of an external control signal to be altered and to perform frequency multiplication for a horizontal synchronizing signal in accordance with the value so as to obtain a sampling clock signal to be fed into an analog-digital converter, whereby the clock frequency is variable. The enlargement and contraction of an image in a horizontal direction is achieved by altering the data quantity of the involved digital image signal per a scanning line, which is to be written into a memory during one cycle of the horizontal synchronizing signal, by means of utilizing the sampling clock signal as a write-enable signal for the memory.
The enlargement and contraction of an image in a vertical direction is achieved in such a manner that a clock signal having a higher frequency than the sampling clock signal (the write-enable signal) is used as a read-enable signal to read the written digital image signal from the memory at a number of times during one horizontal scanning period of the input video signal so as to display them on a plurality of scanning lines.
However, the known circuit has a number of disadvantages as follows. With this circuit, when interpolation is performed horizontally, the sampling frequency for the analog-digital converter which receives an analog video signal is increased (decreased when contraction is required), and thus the number of samples of an output digital video signal or the number of dot data pieces to be used for display is increased (decreased when contraction is required). Thus, if a video signal is provided as a digital signal to the display device, this circuit is simply helpless. If the horizontal interpolation technique underlying this circuit were forcibly applied to an input digital video signal, the input digital video signal would have to be converted by a digital-analog converter into an analog signal once, and subsequently the resultant analog signal would be digitized again at a desired frequency for the horizontal interpolation. This would require complicated process and circuit configuration.
With the circuit, when interpolation is achieved vertically, control is introduced such that either a clock signal with a higher frequency or a clock signal with a normal frequency is selected as a read-enable signal for each horizontal scanning period of the input video signal, and the number of horizontal scanning periods of the input video signal during which the higher frequency clock is selected is adjusted in accordance with the specified size of the image in a vertical direction. Such a manner of interpolation does not allow a sufficient freedom in selection of the interpolation ratio. Namely, the interpolation ratios selectable are rather limited. Moreover, because the video information to be carried by an interpolated line must be applied for the corresponding line of a display device in a considerably shorter period than that required for the information carried by the other (ordinary) line, higher speed scanning is needed for only the interpolated line. Accordingly, it may cause the sequential scanning operation of the display device side to have a partiality.